Legacy and migration

Convert STL to SCL or LAD and prove the new block behaves the same

Coilmind reads your STL networks and rewrites them into SCL or LAD, whichever your site maintains. The check is the original block’s tests, run against the rewrite on PLCSIM Advanced. Anything it can’t translate cleanly is listed for you to decide.

Start your 14-day free trial

A test suite on PLCSIM Advanced going from 0 passed to 2 / 2 pass. A rewritten block is checked the same way: the original’s tests have to pass against it.

Why STL blocks end up being rewritten

Most of the STL still running came over from S7-300/400 projects: blocks written fifteen or twenty years ago that still run a line and that nobody on site wants to open. The people who wrote them have moved on, and the people maintaining the machine today read LAD and SCL.

The platform has moved the same way. The S7-1200 never supported STL, and on the S7-1500 Siemens steers you towards SCL and LAD. Every time an old project is moved to a newer CPU, the STL blocks come along and the question of what to do with them comes back.

Doing the rewrite by hand means going network by network, working out what the accumulator holds at each line, rewriting it and then hoping the new block does the same thing. On a project with a lot of STL that is weeks of work, and the hoping part is the risky one.

How a migration runs

You ask for it in chat, block by block, on the project open in TIA Portal. Coilmind follows a migration cookbook written for STL, and does not improvise the translation.

Coilmind reads the STL block, network by network, together with its interface and the blocks it calls.

It drafts tests from the original’s behaviour or your spec: inputs, number of cycles, expected outputs. You review them and run them against the original first.

It rewrites the block into SCL or LAD and imports it. The import has to compile, or the change is not applied.

The same tests run against the new block on PLCSIM Advanced. Failed assertions are listed, so you see which case behaves differently.

There is no one-click equivalence prover. The proof is the test suite: if it passes on the original and on the rewrite, the two behave the same for the cases you tested. Cases you didn’t test are not covered.

LAD as a target, not only SCL

STL conversion usually targets SCL, because text to text is the easy direction. That is fine if your maintenance team reads SCL. On many sites the electricians on night shift open LAD and nothing else, and a block they can’t follow online is a block they will call you about.

Coilmind generates LAD for everything except fail-safe (F-) blocks, so you can pick per block: SCL for the calculation-heavy ones, LAD for the interlocks and sequences someone will need to watch in online mode. The tests don’t care which one you pick, because they run against the compiled block.

What is not translated automatically

Some STL has no clean equivalent, or only one that depends on context the code doesn’t show. Coilmind does not guess in those places. It lists them for you, by network, and leaves the decision with you. The usual suspects:

›Indirect addressing: pointers, ANY parameters built by hand and address register (AR1/AR2) arithmetic.
›Accumulator use in unusual forms, such as logic that depends on what an earlier instruction left in ACCU2.

The list you get is specific to your block. A short list means most of the block translated cleanly. A long one tells you up front that this block needs a person, before you’ve spent a day on it.

Without PLCSIM Advanced

The rewrite itself works without it: Coilmind reads the STL, writes the SCL or LAD, imports it and compiles it. What you lose is the proof. Without PLCSIM Advanced the tests can’t run, so nothing checks that the new block behaves like the old one, and you are back to reviewing it by hand.

PLCSIM Advanced V3 to V6 is supported. Siemens sells it separately; Coilmind does not include it.

What protects the original block

›A local snapshot is taken before every block change, and restore is one click.
›Every import goes through the compile gate. If the rewrite doesn’t build, it is not applied.
›Tests run on PLCSIM Advanced only. Coilmind never downloads to real hardware.
›Works on the project open in TIA Portal V17 to V21, on Windows, through the Openness API.

Common questions

Can I keep STL blocks?

Yes. Nothing forces a rewrite. Coilmind reads STL for analysis, cross-references and documentation, so you can leave a block in STL and still ask what it does or where its outputs are used. You decide which blocks get rewritten, if any.

Does it handle indirect addressing?

It reads it, but it does not translate it on its own. Pointers, hand-built ANY parameters and address register arithmetic are listed for you by network, because the right SCL or LAD for them depends on what the addresses point at at runtime. You decide how each one is rewritten.

Do I need PLCSIM Advanced?

For the rewrite, no. For the proof, yes. Running the original’s tests against the new block needs PLCSIM Advanced V3 to V6, which is a separate purchase from Siemens. Without it you get the rewritten block, compiled, but no test run.

Does it migrate an S7-300 project to S7-1500?

Only the block code. Coilmind does not touch hardware configuration or device migration; that stays in TIA Portal’s own tools. Once the project is on the new CPU, Coilmind helps with the STL blocks that came over with it.

Try it on one STL block

Pick a block you know well, let Coilmind rewrite it into SCL or LAD, and run the original’s tests against both.